Immersion lithography is useful for enhanced resolution photolithographic printing for the manufacture of, for example, integrated circuits. Photolithography or lithography is a microfabrication process in which light is used in an exposure step to transfer by way of projection geometric patterns from a photomask, also known as a reticle or simply a mask, to light-sensitive material called a photoresist disposed on a substrate such as a wafer. Areas where the photoresist is removed in a development step following the exposure may be filled or further patterned through successive processing. Immersion lithography techniques include using an immersion liquid interposed, with the photoresist, between the substrate and a lens of an exposure system from which light is emitted for patterning the photoresist and the substrate.
Earlier immersion lithography processes used a top coat to protect the photoresist from degradation and from contaminating the immersion liquid at the interface between the immersion liquid and the photoresist. Top coats were substantially obviated by the introduction of special “immersion resists” suitable for use with immersion liquids. It is desirable to avoid using a top coat to minimize material costs, to achieve process simplification, and to minimize potential sources of defects.
An unexposed immersion photoresist has a hydrophobic surface, however, which may cause problems in aqueous development processes. In particular, in and near large unexposed areas, organic material can coagulate during the (aqueous) development process of a positive lithographic process (wherein the illuminated parts of the resist are removed in the development step), leading to characteristic defects, which are sometimes called “blob” defects, or organic residues. A top coat may be used to address such defects because the top coat may contain acidic components that slightly deprotect the underlying resist, leading to a certain top loss and a less hydrophobic remaining resist surface. Therefore, depending on the layout of the photolayer, or the desired resulting pattern of the lithographic processing, a top coat may be needed not to enable immersion exposure, but to ensure a low defect level after development. A similar problem can arise in conventional non-immersion lithography, in which a top anti-reflective coating (TARC) may be required to prevent defects in certain layout situations.
Another problem with large unexposed areas of a photoresist lies in the photomasks or reticles. Advanced reticles are patterned by electron lithography, wherein the mask pattern is written into a thin resist layer with an electron beam or e-beam writer, followed by a development and an etch process. Because these processes have a dependency on pattern density, a variation in pattern density within the mask layout can lead to structure size (critical dimension or CD) variations on the reticle. In particular, the back scattering of electrons in a glass substrate of the reticle causes a strong pattern density dependence with an equal or less than 10 micron (10μ) length scale, which corresponds to about a 1 to 2μ length scale on a wafer (because the photomask is typically projected onto the wafer with an inverse magnification factor, typically 4). To compensate for this effect, algorithms are used in the mask writing process to modify shot size and/or beam dose. Such compensation mechanisms can lack accuracy and precision. To avoid reticle-induced CD uniformity problems, it is therefore beneficial to create a homogeneous pattern density in the mask layout down to the <1μ length scale (wafer level).
In the following, all length or area values will refer to the wafer scale, unless stated otherwise. Also, it will be assumed for convenience that the substrate patterned in the lithographic process is a wafer (which is by far the most common application of lithography), unless the description refers to the patterning of a reticle. Still, the methods, devices and systems disclosed here are not restricted to the processing of wafer substrates. Finally, the wafer lithography processes illustrated in the examples will be understood as being positive lithography processes using aqueous developer, unless stated otherwise.
The above-mentioned back scattering effect in e-beam writing and the corresponding compensation mechanisms have the effect of reducing the lithographic contrast of the mask writing process in and near regions of high writing density. Such layout situations can exist, for example, in the writing of a clear field reticle for an active layer in a positive mask lithography process. In such a reticle, the CD uniformity of the reticle is degraded near large clear areas. It is therefore beneficial to reduce the clear field percentage on the reticle in such layout situations.
In summary, in the mask layout, it is beneficial to avoid large “dark” areas in a positive lithographic process with an aqueous development process, because such areas can cause characteristic defects such as blob defects or organic residues on the wafer, particularly in a top coat free process; avoid large areas with high writing density on the reticle which cause a decrease of contrast in the reticle patterning process, for example, large clear areas if the mask lithography process is a positive process; and keep the pattern density as homogeneous as possible down to the <1μ length scale to avoid CD variation by pattern density dependent effects.
Layout areas that do not contain functional structures are often filled with fill pattern, which typically contains relatively large, simple, regular structures such as squares. Because such fill pattern appears on the wafer after patterning, it can only be used in areas where it does not interfere with the functional pattern in the previous or subsequent layers. Also, to avoid optical cross talk with a functional pattern caused by diffraction effects, a certain minimum distance has to be kept between a functional pattern and fill pattern of typically >1μ.
FIGS. 1A through 1C show a typical mask layout, a resist coated wafer during an exposure step with the mask, and a resulting print after a development step, respectively. Light portions in FIG. 1A represent portions on the reticle where the absorber layer has been removed (clear portions), light portions in FIG. 1B represent illuminated portions of the wafer during exposure, and light portions in FIG. 1C represent portions of the wafer where the resist has been removed during development. FIG. 1A shows a functional pattern including a main functional pattern 101 and sub-resolution assist features (SRAFs, also called scatter bars or scattering bars) 102, and a “conventional” fill pattern 104. For convenience, the reticle pattern is shown on the same scale as the wafer pattern, although in reality it is typically magnified by a factor of typically 4; and the corner rounding of the reticle pattern, which is typically less pronounced than the corner rounding of the corresponding wafer pattern, is not shown. The function of the SRAFs, which are not printed on a wafer in a lithographic process because they are too small, is to support the main functional pattern by enhancing the depth of focus and optical contrast of the latter in the lithographic exposure step. Placing SRAFs to support main functional pattern and/or placing conventional, printing fill pattern is not always necessary, and not essential to the methods, devices, and systems disclosed here, but common in advanced lithography. Other than the SRAFs, the fill pattern 104 also appears in the printed wafer pattern, it should therefore be disposed at a minimum distance from the functional pattern, which is typically >1μ.
In the following, structures of the reticle pattern intended to appear on the patterned wafer to fulfill a, usually electric, function will be referred to as main functional pattern. The term “functional pattern” will be used to denote pattern including a main functional pattern and/or optical support structures of the main functional pattern such as SRAFs.
A dark area having a width of typically >1μ interposes the functional pattern 101, 102 and the fill pattern 104. The dark area and a part of the area around the relatively large structures of the fill pattern 104 are not illuminated during the lithographic exposure. For example, FIG. 1B shows the images 105, 106 and 107 of the functional pattern 101, 102 and the fill pattern 104, respectively, illuminated during lithographic exposure. In a top coat free immersion lithographic process, the dark areas including areas around structures of the fill pattern 107 have a higher risk of generating blob defects or organic residues. FIG. 1B shows that the region between remains unexposed during illumination exposure. Similarly, unexposed areas are shown between the relatively large fill structures of fill pattern 107.
FIG. 1C shows a wafer pattern after resist development. As can be seen, the main functional pattern 109 and the fill pattern 111 are printed on the wafer, while the SRAFs are not. In immersion lithography without a top coat, there is an increased risk of blob defects or organic residues in the non-exposed regions, due to the hydrophobicity of the unexposed photoresist. Such defects or residues can also be transported to other areas of the wafer during the development process, especially to neighboring areas as the main functional pattern 109, where they can lead to electrical failure and yield loss of the finished chips. Apart from the risk of characteristic defects, the reticle pattern density on the about 1μ scale drops from about 50% in the main functional pattern area 101 to about 0% in the area between the functional pattern and fill pattern 104, as shown in FIG. 1A, which can lead to reticle CD variations at the border of the functional pattern.
A need therefore exists for lithography methods, apparatus, and system enabling high resolution lithographic printing on a photoresist layer without a need for a top coat.